A Single-Stage Low-Power Double-Balanced Mixer Merged with LNA and VCO

A Merged CMOS LNA and Mixer for a WCDMA Receiver

A low-noise amplifier (LNA) and mixer circuit in 0.35m CMOS operates at 2.1 GHz. Merging the LNA and mixer lowers the number of transistors in the signal path and thereby also the nonlinearity and power consumption. The circuit meets the specifications for a direct conversion wide-band code-division multiple access (WCDMA) receiver. Its noise figure is 3.4 dB (5 kHz to 5 MHz), the total convers...

An Rf-cmos Lna and Mixer Merged Design Strategy

Low Noise Amplifier and Mixer design considerations for 2.45 GHz Bluetooth applications have been studied. A detailed noise analysis is presented. A design strategy for an inductively degenerated common-source LNA with cascode transistor and current-commutating Mixer is proposed, considering the tradeoffs between noise, linearity, power consumption and matching of impedances. Additionally, this...

A LOW-POWER DOUBLE BALANCED OSCILLATOR MIXER DESIGN IN 90nm CMOS TECHNOLOGY

CMOS Scaling technologies are the main caused for great impact on Analog design. The most severe affect is the reduction in the voltage supply. A double balanced down conversion oscillator mixer using 90 nm CMOS technology is proposed in this work. This oscillator mixer consists of an individual mixer stacked on a voltage-controlled oscillator (VCO). The proposed stacked structure allows entire...

Implementation of a Power Optimized Lc Vco & Mixer Co-design

A Direct Down-conversion Receiver for Low-power Wireless Sensor Networks

A direct downconversion receiver implemented in 0.13 μm 1P8M process is presented. The circuit is formed by a single-end LNA, an active balun for conversion into balanced mode, a quadrature double-balanced passive switch mixer and a quadrature voltage-controlled oscillator. The receiver operates in the 2.4 GHz ISM band and complies with IEEE 802.15.4 (ZigBee) specifications. The circuit exhibit...